20th International Workshop on Logic and Synthesis
Topics of interest include (but are not limited to): synthesis and optimization; power and timing analysis; testing, validation and verification; architectures and compilation; and design experiences. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are also encouraged. Both complete papers as well as extended abstracts highlighting new problems and new topics of research are welcomed. Only original and previously unpublished material is permitted.
Accepted papers are distributed only to IWLS participants. The workshop format includes paper presentations, posters, invited talks, social lunch and dinner gatherings, and recreational activities.
Technical Program Co-Chair: Valeria Bertacco, Univ of Michigan
Technical Program Co-Chair: Igor Markov, Univ of Michigan
Special Sessions Chair: Ilya Wagner, Intel Corp.
Special Activities Chair: Alan Mishchenko, UC Berkeley
Local Arrangements: Ali U. Irturk, UC San Diego
Irturk is a postdoctoral researcher at UCSD in the lab of CSE professor Ryan Kastner, who is a co-author on a paper to be delivered on Sunday, June 5 at 9:15am, on An Improved Encoding Technique for Gate Level Information Flow Tracking. Kastner -- who co-manages the UCSD-National Geographic Engineers for Exploration Program -- will also moderate a session on Saturday at 11:40am on Security Through Synthesis: Towards Trustworthiness as a Hardware Design Constraing (Rather Than an Afterthought).
Fellow CSE professor Scott Baden will deliver an invited talk on Saturday at 5:25pm on A Response to Technological Change: Incorporating Semantics into Software Translation.
Other invited talks will be delivered by Rand Gray of Intel, and Tim Sherwood of UC Santa Barbara.